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2698 / SCC2698BC1A84 / SCC2698 / refurbs signetics
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Please note: These parts are refurbs.
Enhanced octal universal asynchronous receiver/transmitter (Octal UART)
The SCC2698B Enhanced Octal Universal Asynchronous Receiver/Transmitter (Octal UART) is a single chip MOS-LSI communications device that provides eight full-duplex asynchronous receiver/transmitter channels in a single package. It is fabricated with CMOS technology which combines the benefits of high density and low power consumption.
The operating speed of each receiver and transmitter can be selected independently as one of 26 fixed baud rates, a 16X clock derived from a programmable counter/timer, or an external 1X or 16X clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the Octal UART particularly attractive for dual-speed channel applications such as clustered terminal systems.
The receiver is quadruple buffered to minimize the potential of receiver overrun or to reduce interrupt overhead in interrupt driven systems. In addition, a handshaking (RTS/CTS) capability is provided to disable a remote UART transmitter when the receiver buffer is full.
The UART provides a power-down mode in which the oscillator is frozen but the register contents are stored. This results in reduced power consumption on the order of several magnitudes. The Octal UART is fully TTL compatible and operates from a single +5V power supply.
The SCC2698B is an upwardly compatible version of the 2698A Octal UART. In PLCC packaging, it is enhanced by the addition of receiver ready or FIFO full status outputs, and transmitter empty status outputs for each channel on 16 multipurpose I/O pins. The multipurpose pins of the 2698B RIO pins, thus DMA and modem control is provided.
Eight full-duplex independent asynchronous receiver/transmitters
Quadruple buffered receiver data register
– 5 to 8 data bits plus parity
– Odd, even, no parity or force parity
– 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
Baud rate for the receiver and transmitter selectable from:
– 26 fixed rates: 50 to 38.4K baud Non-standard rates to 115.2K baud
– User-defined rates from the programmable counter/timer associated with each of four blocks
Parity, framing, and overrun error detection
Line break detection and generation
– Normal (full-duplex), automatic echo, local loop back, remote loopback
Four multi-function programmable 16-bit counter/timers
Four interrupt outputs with eight maskable interrupting conditions for each output
Receiver ready/FIFO full and transmitter ready status available on 16 multi-function pins in PLCC package
Single +5V power supply with low power mode
Eight multi-purpose output pins
Sixteen multi-purpose I/O pins
Sixteen multi-purpose Input pins with pull-up resistors
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